GPU NTC Process Variation Compensation with Voltage Stacking

Near-threshold computing (NTC) has the potential to significantly improve efficiency in high throughput architectures, such as general-purpose computing on graphic processing unit (GPGPU). Nevertheless, NTC is more sensitive to process variation (PV) as it complicates power delivery. We propose GPU stacking, a novel method based on voltage stacking, to manage the effects of PV and improve the power delivery simultaneously. To evaluate our methodology, we first explore the design space of GPGPUs in the NTC to find a suitable baseline configuration and then apply GPU stacking to mitigate the effects of PV. When comparing with an equivalent NTC GPGPU without PV management, we achieve 37% more performance on average. When considering high production volume, our approach shifts all the chips closer to the nominal non-PV case, delivering on average (across chips) ˜80 % of the performance of nominal NTC GPGPU, whereas when not using our technique, chips would have ˜50 % of the nominal performance. We also show that our approach can be applied on top of multifrequency domain designs, improving the overall performance

Maximizing Utilization and Minimizing Migration in Thermal-Aware Energy-Efficient Real-Time Multiprocessor Scheduling

This work proposes CAlECs, a clustered scheduling system for MPSoCs subject to thermal and energy constraints. It calculates off-line a cyclic executive honoring temporal and thermal constraints, for a hard real-time (HRT) task set at minimum frequency to reduce consumed energy, minimizing context switches and migrations. It also provides an on-line controller able to manage system and task parametric variations and soft real-time (SRT) tasks, always meeting the HRT task set constraints and the system thermal bound. CAlECS maximizes CPU utilization to help avoid overprovisioning contributing to a low SWaP factor. Its modular design allows the utilization of different modeling and scheduling approaches, and makes the off-line and on-line components independent from each other to better suit the requirements of a specific system. We experimentally show that the cyclic executive provided by CAlECS for HRT task sets outperforms RUN, a reference off-line algorithm in terms of optimal number of context switches